Wilmington, MA (March 28, 2000) - Kentron Technologies, a leader in next generation memory architectures today announced its Quad Band Memory (QBMtm) Technology that is designed to generate double the bandwidth of the fastest Double Data Rate (DDR) memory chip.

While DDR will generate up to 2.1GB/sec bandwidth, and Rambus is expected to generate 1.6GB/sec, Kentron’s QBM technology will permit DDR to generate over 4.2GB/sec, providing significant performance advantages to computing hardware.

The new memory architecture speeds up the performance of processors used in Network Servers, Routers, Telecommunications hardware as well as Internet hardware. The QBM technology may also be applied to wireless and portable applications.

Due to the overwhelming growth in data sent over the Internet, computer hardware manufacturers have been looking for new ways to create faster, more powerful solutions for worldwide communications and E-commerce. Kentron Technologies has focused on memory solutions to address the growing requirements of the Internet infrastructure.

Quad Band Memory (QBM) is based on the DDR chip technology being endorsed by the largest computer manufacturers and memory chip manufacturers including IBM, Samsung, Micron, Infineon, NEC, Hyundai, Hitachi, and Mitsubishi, as well as Intel and Microsoft's new X-BOX. The semiconductor engineering standardization body (JEDEC) has also endorsed DDR chip technology as the next industry standard.

"While rival technologies are battling to win the war of next generation memory, Kentron’s QBM provides twice the bandwidth of the fastest DDR chip at the same cost curve," stated Robert Goodman, Chief Executive Officer at Kentron Technologies. "While DDR provides twice as much data at the same clock speed, QBM provides four times as much data at the same clock speed," added Goodman.

ABOUT KENTRON TECHNOLOGIES

Founded in 1996, Kentron Technologies specializes in the design, engineering and manufacturing of next-generation memory products and architectures to meet the speed and density requirements of high performance systems. The company follows an overall system approach from CPU, to chipset, to system bus for engineering the next generation high-density memory and provides engineering and manufacturing support at every phase of the customer's product life cycle.